After helping clients get their products compliant for EMI, I’ve seen one underlying issue: Poor PC board design. In my experience, IoT product designers run into problems caused by poor PC board design. Poor design can cause endless delays when on-board energy sources disrupt sensitive receiver circuits, resulting in cellular compliance failures. GPS and Wi-Fi receivers can also lose sensitivity.

In this part 1, you’ll see how signals move through PCB traces and how EM fields affect that movement. In part 2, I’ll contrast the difference between good and poor PCB stackups. Part 3 covers signal routing and board partitioning, and you’ll find more detail on partitioning in part 4.

There are many factors that contribute to poor EMI designs. These include:

I’ve already addressed crossing clock traces over gaps in the return plane (Ref. 1, 2). Fixing this last item regarding layer stack-ups will, however, usually correct a myriad of ills, including many of the other items on the list.

While attending university circuits classes most of us were taught incorrectly how DC and AC current works in lumped or distributed (transmission line) circuits. In our “fields and waves” classes, we were not likely instructed in the practical applications of circuit board design or signal propagation through circuit boards. In truth, these two concepts—circuits and fields—work together (are complementary) in propagating a digital signal through a microstrip or stripline.

Before you can understand how signals propagate in PC boards, you must first understand some physics.

We were all taught that “current” was the flow of electrons in copper. This is close to the truth, except we tend to think of positive current flow—the lack of an electron, often referred to as a “hole.” Electrons and the “holes” (positive charge) they leave behind, however, travel very slowly (Ref. 3). See the explanation coming up shortly.

This current flow is true, of course, for DC circuits (with exception of the initial battery connection transient). But for AC (or RF) circuits or for the “DC” output (with transients) from switch mode power supplies, we need to understand all connecting wires/traces must now be considered transmission lines.

First, let’s consider how capacitors seemingly allow the flow of electrons. After all, isn’t that how decoupling capacitors work? Referring to Figure 1 , if we apply a battery to the capacitor, any positive charges applied to the top plate will repel positive charges on the bottom plate, leaving negative charges. If we apply an AC source to the capacitor, you might assume that current flows through the dielectric, which is impossible. James Clerk Maxwell called this “displacement current,” where positive charges merely displace positive charges on the opposite plate leaving negative charges, and vice versa. This displacement current is defined as dE /dt (changing E-field with time).

Figure 1 The concept of displacement current through a capacitor.

You should also realize that electrons and the positively-charged holes do not travel near light speed in copper as we were taught, but move at about 1 cm/sec, due to the very tight atomic bond of the copper molecules (Ref. 4). There are certainly clouds of free electrons and holes, but these move slowly from molecule to molecule. This is called conduction current and is what we would measure with an ammeter. Conduction current is related to the tangential component of the B-field, that is the curl B = J .

The influence of one electron in the copper molecule to its neighbor (and on down the transmission line) propagates at the speed of the EM field in the dielectric material. In other words, jiggle one electron at one end of a microstrip and it jiggles the next, which jiggles the next, and so on, until it jiggles the last one at the end. This jiggling is called a kink in the E-field and can be envisioned as the Newton’s Cradle toy, a mechanical analogy, where the first ball hits the next and this eventually pops off the end ball (Figure 2).

Figure 2 Newton’s Cradle, an analogy to demonstrate the “kink” in the E-field as it travels from one electron to the next.

Let’s now consider a digital signal with a wave front moving at about half light speed (about a typical 6 in./ns in FR4 dielectric) along a simple microstrip over an adjacent ground return plane (GRP) as illustrated in Figure 3.

Figure 3 The digital signal (an electromagnetic wave) travels through the dielectric space between the microstrip and ground reference plane (GRP).

The next realization (thing to grasp) is that the EM field of the digital signal travels in the dielectric space—not the copper. The copper merely “guides” the EM wave (Ref. 5 and 6).

When the signal (EM wave) is first applied between the microstrip and GRP, it starts to propagate along the transmission line formed by the microstrip over an adjacent GRP. There is a combination of conduction current and displacement current (across the dielectric).

All the exciting “EMI stuff” happens at the wave front as the EM wave propagates. At an instant it time, the electric field behind the initial wave front is stable at whatever the applied voltage is at the moment and the electric field in front of the initial wave front is zero. The fast rise or fall times of the signal contain all the harmonic energy and this is what creates the EMI.

If the load impedance is equal to the characteristic impedance of the transmission line, then there will be no reflections of the EM wave back to the source. However, if there is a mismatch, there will be reflected EM fields propagating back to the source. In reality, most realistic digital signals will have multiple reflections moving back and forth through the transmission line simultaneously. The transition zone (rise time or fall time) of these propagating waves will potentially produce EMI.

Now that you see how signals move in circuit boards, there are two very important principles when it comes to PC board design:

To construct a transmission line, you need two adjacent pieces of metal that capture or contain the field. For example, a microstrip over an adjacent GRP or a stripline adjacent to a GRP or a power trace (or plane) adjacent to a GRP. For example, locating multiple signal layers between power and ground reference planes will lead to real EMI issues for fast signals. Observing these two rules will dictate the layer stack-up.

In other words, every signal or power trace (routed power) must have an adjacent GRP and all power planes should have an adjacent GRP. Multiple GRPs should be tied together with a matrix of stitching vias.

If you break the path for conduction current in the GRP through a gap or slot, we start to get “leakage” of the EM field throughout the dielectric space, which leads to edge radiation from the board and cross-coupling to other circuits through via-to-via coupling. This also occurs when we pass a signal through multiple ground reference or power planes if there is no adjacent stitching via or stitching capacitor (to connect GRP to power planes).

These topics and specific PC board designs will be described in my next article, “Design PCBs for EMI, part 2: Basic stack-up.”

Acknowledgement: I’d like to thank Eric Bogatin for his valuable help in helping me understand the physics of electromagnetic wave propagation in PC boards, as well as Ralph Morrison, Daniel Beeker, and Rick Hartley for their training in proper PC board design for high frequency digital circuits.

—Kenneth Wyatt is president and principal consultant of Wyatt Technical Services.

“Thanks Ken for a very concise description. I too learned this from Eric Bogatin through his book: Signal and Power Integrity – Simplified. Highly recommended for any EE involved in board design. What finally has dawned on me is that in 4-layer design w

“I agree Bogatin's book (now in the 3rd edition) is excellent. I'm actually pulling from his book, as well as what I've learned from Ralph Morrison, Dan Beeker, and Rick Hartley – three engineers I believe best understand the physics behind how HF signals

“If you do have EMI problems with a PCB design, you can make near field measurements to locate the sources and come up solutions using passive near-field probes. Before you perform a near-field analysis, you first need to know how the E and H fields are di

“Thanks Rich, near field probing is the first step in my “three-step” EMI troubleshooting process, which I've written about quite a bit. The other two steps are the use of current probes to measure cable RF currents and using a nearby antenna to confirm

“Hi Kenneth Wyatt,nFirst thank you for your time to helping me to get ok with Maxwell's equations.nI have a little trouble after reading “Design PCBs for EMI”. nWhy should signals be referenced to a Ground Return Path? Are speaking about the DC return

“Thanks for the information. It is easier to understand without multiple mathematical equations. Generation of EMI is still a point of contention in the article, that is what I feel. “

“To minimize EMI requires that we minimize the differential mode loop areas (that is, use of a ground return plane adjacent to the signal micro strip) and to minimize EMI and cross-coupling of signals, avoid having different signals sharing the same dielec

“Thanks for your comments. In most cases, the ground return path = the DC return path. As for referencing high speed (AC) signals to the power plane, I recommend against it. Return currents (that is the conduction current) typically wants to return back to

“For those who might be following this discussion, I'll be presenting a free webinar on low EMI PC Board Design, hosted by Sierra Circuits, this coming Wednesday, Nov. 6th, at 9:30 AM Pacific Time. Register here: https://zoom.us/webinar/register/WN_Gw

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